{"id":8254,"date":"2026-09-11T01:22:50","date_gmt":"2026-09-10T23:22:50","guid":{"rendered":"https:\/\/www.scs.ch\/uncategorized-en-us\/soc-fpga-4d-full-range-radar\/"},"modified":"2026-09-20T07:38:42","modified_gmt":"2026-09-20T05:38:42","slug":"soc-fpga-4d-full-range-radar","status":"publish","type":"post","link":"https:\/\/www.scs.ch\/en\/case-studies\/soc-fpga-4d-full-range-radar\/","title":{"rendered":"SOC\/FPGA: 4D Full-Range Radar"},"content":{"rendered":"

Initial Situation<\/h2><\/div>

A high-resolution 4D radar processes enormous amounts of data in real time and thus places high demands on computing power. The algorithm developed by ZF therefore had to be optimally distributed across the different computing units of a modern MPSoC. Computationally intensive pre-processing, such as FFT and peak detection, runs on the FPGA, while subsequent processing steps like tracking can be executed on the ARM core. SCS had to optimize, implement, and test this architecture under the requirements of functional safety. <\/p>\n<\/div>

\"Eine<\/span><\/div><\/div><\/div>

Project Overview<\/h3><\/div>

Customer<\/strong>
ZF<\/p>\n<\/div>

<\/div><\/div>

Sector<\/strong>
Automotive & Measurement Technology<\/p>\n<\/div>

<\/div><\/div>

Solution<\/strong>
Radar signal processing on SoC\/FPGA, ASIL B compliant.<\/p>\n<\/div>

<\/div><\/div>

System Environment <\/strong>
MPSoC with FPGA\/PL and ARM core, FFT and peak detection in FPGA, post-processing on ARM<\/p>\n<\/div>

<\/div><\/div>

Safety<\/strong>
ISO 26262 ASIL B compliant, ASPICE-compliant documentation<\/p>\n<\/div>

<\/div><\/div>

Partner Status<\/strong>
AMD Premier Partner<\/p>\n<\/div><\/div><\/div><\/div><\/div>

SCS’s Contribution<\/h2><\/div>

SCS transferred ZF’s radar algorithms into a performance-optimized Zynq UltraScale+ architecture and supported the implementation from FPGA design, embedded software, and testing to documentation for functional safety.<\/p>\n<\/div><\/div><\/div>

<\/i><\/div>

FPGA Architecture Implemented<\/h4><\/div>
<\/div>
\n

SCS developed the FPGA architecture and RTL with test-driven development, unit tests, integration tests, system tests, and peer reviews.<\/p>\n<\/div><\/div><\/div>

<\/i><\/div>

Computing Power Maximized<\/h4><\/div>
<\/div>
\n

Timing optimizations and a fully script-based Vivado implementation enabled logic utilization of over 90 percent on the MPSoC.<\/p>\n<\/div><\/div><\/div>

<\/i><\/div>

Functional Safety Integrated<\/h4><\/div>
<\/div>
\n

Development was ISO 26262 ASIL B compliant, including metric calculation, documented development process, and ASPICE-compliant traceability.<\/p>\n<\/div><\/div><\/div>

<\/i><\/div>

Hardware and Software Integrated<\/h4><\/div>
<\/div>
\n

SCS developed low-level software for cache coherence and ECC, a test application based on freeRTOS, and integrated additional IP components for cybersecurity.<\/p>\n<\/div><\/div><\/div>

<\/div><\/div><\/div><\/div><\/div><\/div>
<\/div>

Result<\/h2><\/div>

ZF had a functional prototype for initial tests within a very short time. The FPGA implementation largely utilizes the available computing power of the MPSoC while meeting the requirements for functional safety and traceability. With 192 channels and a range of 350 meters, the 4D radar enables highly detailed scene and object detection for automated driving functions. For example, a vehicle on the highway can detect the end of a traffic jam under a bridge early and brake in time. The system has since been further developed for series production. <\/p>\n<\/div><\/div><\/div>

192 channels<\/h3><\/div>

approximately 16 times higher resolution than a typical vehicle radar.<\/p>\n<\/div><\/div><\/div>

350 m<\/h3><\/div>

range for highly detailed scene and object detection.<\/p>\n<\/div><\/div><\/div>

ISO 26262 ASIL B<\/h3><\/div>

compliant development for functional safety.<\/p>\n<\/div><\/div><\/div><\/div><\/div>

Services Used<\/h2><\/div><\/div><\/div>

FPGA Engineering<\/h3><\/div><\/div><\/div><\/div><\/div><\/div>

Functional Safety \/ ISO 26262<\/h3><\/div><\/div><\/div><\/div><\/div><\/div>

Automotive & Measurement Technology<\/h3><\/div><\/div><\/div><\/div><\/div><\/div><\/div><\/div>
\"A<\/div><\/div>

Your Contact Person<\/h2><\/div>
Felix Eberli<\/div><\/div>

Embedded Systems & Automotive
+41 43 456 16 00<\/a><\/p>\n<\/div>

Speak with the responsible specialist<\/span>Speak with the responsible specialist<\/span><\/div><\/a><\/div>

For questions regarding FPGA signal processing, radar systems, and functional safety in the automotive sector.<\/p>\n<\/div><\/div><\/div><\/div><\/div><\/div><\/div><\/div><\/div>

More Case Studies<\/h2><\/div>